00001
00002
00003
00004
00005
00006
00007
00008
00009
00010
00011
00012
00013
00014
00015
00016
00017
00018
00019
00020
00021
00022
00023
00024
00025
00026
00027
00028
00029 #ifndef NV_NPPIDEFS_H
00030 #define NV_NPPIDEFS_H
00031
00032 #include <stdlib.h>
00033
00040 #ifdef __cplusplus
00041 extern "C" {
00042 #endif
00043
00051 enum
00052 {
00053 NPPI_INTER_NN = 1,
00054 NPPI_INTER_LINEAR = 2,
00055 NPPI_INTER_CUBIC = 4,
00056 NPPI_INTER_SUPER = 8,
00057 NPPI_INTER_LANCZOS = 16,
00058 NPPI_SMOOTH_EDGE = (1 << 31)
00059 };
00060
00064 typedef enum
00065 {
00066 NPPI_FROM_RGB_TO_YCBCR,
00067 NPPI_FROM_YCBCR_TO_RGB
00068 } NppiColorConvMode;
00069
00073 typedef enum
00074 {
00075 NPPI_FROM_444_TO_422,
00076 NPPI_FROM_444_TO_411,
00077 NPPI_FROM_444_TO_420,
00078
00079 NPPI_FROM_422_TO_444,
00080 NPPI_FROM_422_TO_411,
00081 NPPI_FROM_422_TO_420,
00082
00083 NPPI_FROM_411_TO_444,
00084 NPPI_FROM_411_TO_422,
00085 NPPI_FROM_411_TO_420,
00086
00087 NPPI_FROM_420_TO_444,
00088 NPPI_FROM_420_TO_422,
00089 NPPI_FROM_420_TO_411
00090 } NppiSamplingConvMode;
00091
00100 typedef enum
00101 {
00102
00103 NPP_NOT_SUPPORTED_MODE_ERROR = -9999,
00104 NPP_ROUND_MODE_NOT_SUPPORTED_ERROR = -213,
00105 NPP_RESIZE_NO_OPERATION_ERROR = -50,
00106 NPP_BAD_ARG_ERROR = -26,
00107 NPP_LUT_NUMBER_OF_LEVELS_ERROR = -25,
00108 NPP_TEXTURE_BIND_ERROR = -24,
00109 NPP_COEFF_ERROR = -23,
00110 NPP_RECT_ERROR = -22,
00111 NPP_QUAD_ERROR = -21,
00112 NPP_WRONG_INTERSECTION_ROI_ERROR = -20,
00113 NPP_NOT_EVEN_STEP_ERROR = -19,
00114 NPP_INTERPOLATION_ERROR = -18,
00115 NPP_RESIZE_FACTOR_ERROR = -17,
00116 NPP_HAAR_CLASSIFIER_PIXEL_MATCH_ERROR = -16,
00117 NPP_MEMFREE_ERR = -15,
00118 NPP_MEMSET_ERR = -14,
00119 NPP_MEMCPY_ERROR = -13,
00120 NPP_MEM_ALLOC_ERR = -12,
00121 NPP_HISTO_NUMBER_OF_LEVELS_ERROR = -11,
00122 NPP_MIRROR_FLIP_ERR = -10,
00123 NPP_INVALID_INPUT = -9,
00124 NPP_ALIGNMENT_ERROR = -8,
00125 NPP_STEP_ERROR = -7,
00126 NPP_SIZE_ERROR = -6,
00127 NPP_POINTER_ERROR = -5,
00128 NPP_NULL_POINTER_ERROR = -4,
00129 NPP_CUDA_KERNEL_EXECUTION_ERROR = -3,
00130 NPP_NOT_IMPLEMENTED_ERROR = -2,
00131 NPP_ERROR = -1,
00132
00133
00134 NPP_NO_ERROR = 0,
00135 NPP_SUCCESS = NPP_NO_ERROR,
00136
00137
00138 NPP_WARNING = 1,
00139 NPP_WRONG_INTERSECTION_QUAD_WARNING = 2,
00140 NPP_MISALIGNED_DST_ROI_WARNING = 3,
00141 NPP_AFFINE_QUAD_INCORRECT_WARNING = 4,
00142 NPP_AFFINE_QUAD_CHANGED_WARNING = NPP_AFFINE_QUAD_INCORRECT_WARNING,
00143 NPP_ADJUSTED_ROI_SIZE_WARNING = 5,
00144 NPP_DOUBLE_SIZE_WARNING = NPP_ADJUSTED_ROI_SIZE_WARNING,
00145 NPP_ODD_ROI_WARNING = 6,
00146 } NppStatus;
00147
00148 typedef enum
00149 {
00150 NPP_CUDA_UNKNOWN_VERSION = -1,
00151 NPP_CUDA_NOT_CAPABLE,
00152 NPP_CUDA_1_0,
00153 NPP_CUDA_1_1,
00154 NPP_CUDA_1_2,
00155 NPP_CUDA_1_3
00156 } NppGpuComputeCapability;
00157
00158 typedef struct
00159 {
00160 int major;
00161 int minor;
00162 int build;
00163 } NppLibraryVersion;
00164
00165 #if defined( _WIN32 ) || defined ( _WIN64 )
00166 #define __INT64 __int64
00167 #define __UINT64 unsigned __int64
00168 #else
00169 #define __INT64 long long
00170 #define __UINT64 unsigned long long
00171 #endif
00172
00173 typedef unsigned char Npp8u;
00174 typedef unsigned short Npp16u;
00175 typedef short Npp16s;
00176 typedef unsigned int Npp32u;
00177 typedef int Npp32s;
00178 typedef __INT64 Npp64u;
00179 typedef __UINT64 Npp64s;
00180 typedef float Npp32f;
00181 typedef double Npp64f;
00182
00183 #define NPP_MAX_8U ( 0xFF )
00184 #define NPP_MAX_16U ( 0xFFFF )
00185 #define NPP_MAX_32U ( 0xFFFFFFFF )
00186 #define NPP_MIN_8U ( 0 )
00187 #define NPP_MIN_16U ( 0 )
00188 #define NPP_MIN_32U ( 0 )
00189 #define NPP_MIN_8S (-128 )
00190 #define NPP_MAX_8S ( 127 )
00191 #define NPP_MIN_16S (-32768 )
00192 #define NPP_MAX_16S ( 32767 )
00193 #define NPP_MIN_32S (-2147483647 - 1 )
00194 #define NPP_MAX_32S ( 2147483647 )
00195
00196
00199 typedef struct
00200 {
00201 int x;
00202 int y;
00203 } NppiPoint;
00204
00210 typedef struct
00211 {
00212 int width;
00213 int height;
00214 } NppiSize;
00215
00223 typedef struct
00224 {
00225 int x;
00226 int y;
00227 int width;
00228 int height;
00229 } NppiRect;
00230
00231 typedef enum
00232 {
00233 NPP_HORIZONTAL_AXIS,
00234 NPP_VERTICAL_AXIS,
00235 NPP_BOTH_AXIS
00236 } NppiAxis;
00237
00238 typedef enum
00239 {
00240 NPP_CMP_LESS,
00241 NPP_CMP_LESS_EQ,
00242 NPP_CMP_EQ,
00243 NPP_CMP_GREATER_EQ,
00244 NPP_CMP_GREATER
00245 } NppCmpOp;
00246
00247 typedef enum
00248 {
00249 NPP_RND_ZERO,
00250 NPP_RND_NEAR,
00251 NPP_RND_FINANCIAL
00252 } NppRoundMode;
00253
00254
00255 typedef struct
00256 {
00257 int numClassifiers;
00258 Npp32s* classifiers;
00259 size_t classifierStep;
00260 NppiSize classifierSize;
00261 Npp32s* counterDevice;
00262 } NppiHaarClassifier_32f;
00263
00264 typedef struct
00265 {
00266 int haarBufferSize;
00267 Npp32s* haarBuffer;
00268
00269 } NppiHaarBuffer;
00270
00271 #ifdef __cplusplus
00272 }
00273 #endif
00274
00277 #endif // NV_NPPIDEFS_H